1. Field of the Invention
This invention generally relates to the field of microprocessors, and more particularly to a circuit and method for leading or trailing zero detection.
2. Description of the Relevant Art
Microprocessors determine the speed and power of personal computers, and a growing number of more powerful machines, by handling most of the data processing in the machine. Microprocessors typically include at least three functional groups: the input/output unit (I/O), the control unit, and the arithmetic logic unit (ALU). The I/O unit interfaces between external circuitry and the ALU and the control unit. I/O units frequently include signal buffers for increasing the current capacity of a signal before the signal is sent to external components. The control unit controls the operation of the microprocessor by fetching instructions from the I/O unit and translating the instructions into a form that can be understood by the ALU. In addition, the control unit keeps track of which step of the program is being executed. The ALU handles the mathematical computations and logical operations that are performed by the microprocessor. The ALU executes the decoded instructions received from the control unit to modify data contained in registers within the microprocessor.
Usually, the register which stores the operand to be modified has as many bit locations as would be required to store the largest possible number on which the microprocessor has been designed to operate. In many operations, however, the magnitude of the operand is substantially smaller than the magnitude of this largest number. In such a case, the register is filled with zeros to the left of the most significant bit of the operand that is a logical one. The added zeros which fill to the left of the most significant bit are known as the leading zeros.
It is known that the speed at which arithmetic operations on the operand are performed can be increased if the number of leading zeros in the operand is known ahead of time. To this end leading zero detection circuits are provided as part of the microprocessor for counting or detecting leading zeros within an operand. It is also well known that speed and circuit size are two critical parameters in the design of any microprocessor. Often, these two parameters are mutually exclusive in that a faster microprocessor or components thereof operate faster when employing large complex circuitry but which have the disadvantage of occupying a large area within the integrated circuit. Prior art circuits for detecting or counting leading zeros within operands are subject to this principle. One prior art leading zero detection circuit operates quickly (i.e., in one clock cycle) but occupies a significant amount of area within the microprocessor due to its circuit complexity. Another prior art leading zero detection circuit occupies a significantly less area within the microprocessor but requires a significant number of cycles in order to complete a count of the leading zeros within an operand. Typically, this second prior art leading zero detection circuit employs a microcode loop which tests each bit of the operand per clock cycle.
It would therefore be desirable to produce a leading zero (or trailing zero) detector circuit that achieves a significant reduction in the number of clock cycles required to produce a leading zero count without significantly increasing the amount of area required to implement the circuit.